摘要: |
基于可编程逻辑阵列(FPGA)的片上可编程及并行流水线具有处理快、实时性等优点,采用Quartus II自带知识产权(IP)核进行设计的方案耗资源多,处理速度慢,针对于此提出了改进的索贝尔(Sobel)算子方案,使以上缺点得到改善;结合Matlab和Modelsim对这两种方案的仿真和验证结果表明,改进后的Sobel算子方案明显优于Quartus II自带IP核进行设计的方案,并且能很好地实现图像边缘检测,减少了偏差. |
关键词: 边缘检测 可编程逻辑阵列 数字图像处理 |
DOI:10.3969/J.ISSN.100-5137.2017.02.013 |
分类号: |
基金项目:上海师范大学样级科研项目(SK201410) |
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Two kinds of implementations of sobel edge detection algorithm based on field programmable gate array |
Zhang Haibin, Zhu Sulei, Xu Mingliang
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College of Information, Mechanical and Electrical Engineering, Shanghai Normal University, Shanghai 200234, China
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Abstract: |
In this paper,two kinds of edge detection scheme based on Field Programmable Gate Array(FPGA) are realized and analyzed by using the Sobel operator.In view of the design which utilizes the intellectual property(IP) cores embedded in the Quartus II has some disadvantages such as more resources are consumed、process is relatively slow and so on,an improved scheme which improves the first design's shortcomings is proposed.Simulation and verification results of these two schemes which are combined with Matlab and Modelsim show that the improved Sobel operator scheme is better than the previous scheme designed by using IP cores embedded in the Quartus II,achieving a good image detection and reducing errors. |
Key words: edge detection field programmable gate array digital image processing |